Cadence Design Systems recently announced that it has been presented with four TSMC Partner of the Year awards at the TSMC 2019 Open Innovation Platform (OIP) Ecosystem Forum. Cadence achieved recognition for the joint development of the N6 design infrastructure, SoIC design solution, cloud-based productivity solution and DSP IP.
These awards were given to Cadence based on the following work that has been delivered:
- N6 design infrastructure: Cadence participated in an in-depth collaboration with TSMC on the design infrastructure development of this advanced process technology and has been working with customers on N6 design starts both on production designs and test chips.
- SoIC Design Solution: Cadence collaborated with TSMC on the development of a design solution and delivered a reference flow that includes a full suite of Cadence® digital and signoff, custom/analog, and IC package and PCB analysis tools.
- Cloud-based TSMC OIP Virtual Design Environment (VDE): Cadence collaborated with TSMC to add the CloudBurst Platform to Cadence-managed OIP VDE environments, elevating ease of use and enabling mutual customers to tape out advanced process designs using digital, custom and verification flows delivered via the cloud to improve overall productivity and meet compressed schedules.
- DSP IP: Cadence worked with TSMC to enable customers to complete successful projects using the Cadence Tensilica® DSP IP, a widely-used DSP IP in the TSMC portfolio.
“Our continued collaboration with Cadence is enabling our customers to utilize our advanced technologies to design with confidence and meet design goals,” said Suk Lee, TSMC senior director of the Design Infrastructure Marketing Division. “We look forward to seeing our customers unleash their silicon innovations in their respective markets using our advanced N6, TSMC-SoIC, cloud, and DSP IP solutions.”
“Through our close collaboration with TSMC, we’re enabling mutual customers to consistently deliver successful innovations using our latest technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “These awards from TSMC exemplify Cadence’s commitment to delivering upon its Intelligent System Design strategy, which enables customers to achieve SoC design excellence.”